CUDA Programming/Terminology: Difference between revisions
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Here are the list of various terms that are specific to GPU Parallel Computing field: |
Here are the list of various terms that are specific to GPU Parallel Computing field: |
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= Kernel = |
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== Kernel == |
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== OpenCL Definition == |
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A kernel is a function declared in a program and executed on an OpenCL device.[2] |
A kernel is a function declared in a program and executed on an OpenCL device.[2] |
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<i>See also:</i> [[#Kernel_Object|Kernel Object]] definition |
<i>See also:</i> [[#Kernel_Object|Kernel Object]] definition |
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= Kernel Object = |
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== OpenCL Definition == |
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A kernel object encapsulates a specific [[#Kernel|kernel]] function declared in a program and the argument values to be used when executing this function. |
A kernel object encapsulates a specific [[#Kernel|kernel]] function declared in a program and the argument values to be used when executing this function. |
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= Compute Capability = |
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== CUDA Definition == |
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It is defined by a major and a minor revision number. Devices with the same major revision number are of the same core architecture. The minor revision number corresponds to an incremental improvement to the core architecture, possibly including new features. |
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= SIMT = |
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== CUDA Definition == |
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SIMT (Single-Instruction, Multiple-Thread) is an architecture that manages the execution of multiple [[#Thread|threads]] concurrently. |
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<i>See also:</i> [[#Warp|Warp]] |
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= Thread = |
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== CUDA Definition == |
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CUDA thread defines a ready-for-execution/running instance of a [[#Kernel|kernel]]. Each thread has its own instruction address counter and register state. Each thread can be identified by a combination of its three-dimensional thread index and three-dimensional thread-block index. |
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<i>See also:</i> [[#SIMT|SIMT]] |
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= Thread Block = |
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== CUDA Definition == |
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Each [[#Thread_Grid|thread grid]] is divided into thread blocks. Furthermore, when blocks are given to a multiprocessor, each thread block is divided into [[#Warp|warps]]. The way a block is partitioned into warps is always the same; each warp contains threads of consecutive, increasing thread IDs with the first warp containing thread 0. |
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<i>See also:</i> [[#SIMT|SIMT]] |
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= Thread Grid = |
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== CUDA Definition == |
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[[#Thread|Threads]] are partitioned into grids with each grid containing a certain number of [[#Thread_Block|thread blocks]]. Grids can be one-dimensional or two-dimensional. |
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<i>See also:</i> [[#SIMT|SIMT]], [[#Thread|Thread]], [[#Warp|Warp]] |
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= Warp = |
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== CUDA Definition == |
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A warp defines a group of 32 parallel threads. Individual [[#Thread|threads]] composing a warp start together at the same program address. |
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<i>See also:</i> [[#SIMT|SIMT]] |
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= References = |
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[1] NVIDIA CUDA Computing Guide Version 3.1 |
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[2] The OpenCL Specification, Version 1.1, Revision 36 |
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Latest revision as of 04:40, 21 May 2011
Here are the list of various terms that are specific to GPU Parallel Computing field:
Kernel
CUDA Definition
A kernel is a function that, when called, is executed N times in parallel by N different CUDA threads, as opposed to only once like regular C functions.
OpenCL Definition
A kernel is a function declared in a program and executed on an OpenCL device.[2]
See also: Kernel Object definition
Kernel Object
OpenCL Definition
A kernel object encapsulates a specific kernel function declared in a program and the argument values to be used when executing this function.
Compute Capability
CUDA Definition
It is defined by a major and a minor revision number. Devices with the same major revision number are of the same core architecture. The minor revision number corresponds to an incremental improvement to the core architecture, possibly including new features.
SIMT
CUDA Definition
SIMT (Single-Instruction, Multiple-Thread) is an architecture that manages the execution of multiple threads concurrently.
See also: Warp
Thread
CUDA Definition
CUDA thread defines a ready-for-execution/running instance of a kernel. Each thread has its own instruction address counter and register state. Each thread can be identified by a combination of its three-dimensional thread index and three-dimensional thread-block index.
See also: SIMT
Thread Block
CUDA Definition
Each thread grid is divided into thread blocks. Furthermore, when blocks are given to a multiprocessor, each thread block is divided into warps. The way a block is partitioned into warps is always the same; each warp contains threads of consecutive, increasing thread IDs with the first warp containing thread 0.
See also: SIMT
Thread Grid
CUDA Definition
Threads are partitioned into grids with each grid containing a certain number of thread blocks. Grids can be one-dimensional or two-dimensional.
Warp
CUDA Definition
A warp defines a group of 32 parallel threads. Individual threads composing a warp start together at the same program address.
See also: SIMT
