KANAD GHOSE Chair and Professor

Address   N-18, Engineering Building Dept. of Computer Science State University of New York P.O. Box 6000 Binghamton, NY 13902-6000 Phone   (607) 777-4803 Fax   (607) 777-4729 Email   ghose@cs.binghamton.edu

[Current Courses][Research][Projects][Recent Publications] [Patents][Current Students][Former Students]

Current Courses

CS 522  Computer Architecture and Organization

Research Interests

Computer Architecture       low-power architectures, active memory systems, active NIC architectures     Parallel & Distributed Processing       architectures, systems issues     High-Performance Networking       TCP/IP optimizations, network subsystems, active adaptors, mobile networking     VLSI Systems       low power design, architectures     Large-scale volume visualization       out-of-core isorendering, volume-rendering engines using logic embedded in DRAM

Current and Recent Funded Research Projects/Areas

Microarchitectures and compilation techniques for low power       sponsored by Intel, DARPA and NSF     Real-time STorage Systems and QoS in Avionics Systems       sponsored by BAE Systems and NYSTAR TTIP Grant     Application-oriented network subsystems and TCP optimizations       sponsored by NSF - combined research & curriculum development award & instrumentation grants     Programmable network interfaces       sponsored by NSF CRCD, EIA     Out-of-core volume visualization techniques for large-scale data sets       sponsored by NSF - instrumentation award     Real-time DSP multiprocessing architecture       sponsored by AFOSR     ASSERTS - a toolkit for the design, development, & validation of distributed/         multiprocessing real-time systems       sponsored by Lockheed-Martin, Hughes, and NYSEG     Design and implementation of run-time system for the EXECUBE multiprocessor       sponsored by IBM     Other ongoing projects       - fast, parallel file system for very large data sets       - active aural interfaces       - content distribution and caching on the web

Details of Current Projects

Under Construction

Some Past Projects

Under Construction

Education

Ph.D. in Computer Science, Iowa State University, 1988 M.S. in Computer Science, Iowa State University, 1986 M.Tech. in Electronics Engineering, University of Calcutta, 1980 B.Tech. in Electronics Engineering, University of Calcutta, 1977

Academic Awards/Honors

Boeing Research Fellowship (Iowa State University) Phi Kappa Phi Honor Society inductee (M.S., Ph.D.) University Gold Medal (B.Tech.) National Science Talent Search Award National Scholarship

Courses Recently Taught

CS 522  Computer Architecture and Organization (graduate) CS 529  High-Performance Networking (graduate) CS 514  Introduction to VLSI Systems (graduate)

Other Courses Taught in the Last 5 Years

CS 624  Parallel Processing Architectures (graduate) CS 515  VLSI Processor Design (graduate) CS 325  Computer Architecture (undergraduate)

Recent Representative Publications - major updates with post 2003 pubs coming soon!

Click this for a fairly complete list of 2004-2006 publications Energy-Efficient Issue Queue Design, by Dmitry Ponomarev, Gurhan Kucuk, Oguz Ergin, Kanad Ghose, and Peter Kogge, to appear in the IEEE Transactions on VLSI Systems, 2003. yFS: A Journaling File System Design for Handling Large Data Sets with Reduced Seeking, by Zhihui Zhang and Kanad Ghose, to appear in the USENIX Symposium on File Systems and Storage Technlogies (FAST '03), 2003. Multithreaded Isosurface Rendering on SMPs Using Span-Space Buckets, by Peter Sulatycke and Kanad Ghose, in Proceedings of the International Conference on Parallel Processing (ICPP '02), 2002. Reducing Power Requirements of Instruction Scheduling Through Dynamic Allocation of Multiple Datapath Resources, by Dmitry V. Ponomarev, Gurhan Kucuk, and Kanad Ghose, in Proceedings of the 34th ACM MICRO Symposium, 2001, pp. 90-101. Optimal Polling for Latency-Throughput Tradeoffs in Queue-Based Network Interfaces for Clusters, by Dmitry Ponomarev, Kanad Ghose, and Eugeny Saksonov, in Proceedings of Euro-Par 2001, pp. 86-95. Energy-Efficient Instruction Dispatch Buffer Design for Superscalar Processors, by Gurhan Kucuk, Kanad Ghose, Dmitry V. Ponomarev, Peter M. Kogge, in Proceedings of ACM/IEEE International Symposium on Low Power Electronics and Design (ISLPED 2001), 2001, pp. 237-242. Reducing Energy Requirements for Instruction Issue and Dispatch in Superscalar Microprocessors, by Kanad Ghose, in Proceedings of ACM/IEEE International Symposium on Low Power Electronics and Design (ISLPED 2000), 2000, pp. 231-234. A Fast Multithreaded Out-Of-Core Visualization Technique, by Peter Sulatycke and Kanad Ghose, in Proceedings of International Parallel Processing Symposium (IPPS '99), 1999, pp. 569-575. Reducing Power In Superscalar Processor Caches Using Subbanking, Multiple Line Buffers And Bit-line Segmentation, by Kanad Ghose and Milind B.Kamble, in Proc. of 1999 Int'l. Symposium on Low Power Electronic Design (ISPLED '99) (available from the ACM Press), pp. 70-75. Accelerating Object-oriented Applications Using Method Lookup Caches And Register Windowing, by Kanad Ghose, Kiran R. Desai and Peter M. Kogge, Journal of Systems Architecture (the Euromicro Journal), Vol. 45, 1999, pp.1023-1046. A Comparative Study of Some Network Subsystem Organizations, by Dmitry Ponomarev and Kanad Ghose, in Proc. of the IEEE 1998 Int'l. Conf. on High Performance Computing (HiPC '98), pp. 436-443. Caching-Efficient Multithreaded Fast Multiplication of Sparse Matrices, by Peter Sulatycke and Kanad Ghose, in Proc. Of Int'l. Parallel Processing Symposium, 1998, pp. 117-123. Out-of-Core Interval Trees for Fast Isosurface Extraction, by Peter Sulatycke and Kanad Ghose, in Proc. of Late Breaking Hot Topics, IEEE Visualization '98 Conference, pp. 25-28. Caching-efficient Multithreaded Fast Multiplication Of Sparse Matrices, by Peter D. Sulatycke and Kanad Ghose, in the Proc. of Int'l. Parallel Processing Symposium (IPPS '98), 1998, pp. 117-123. The Implementation of Low Latency Communication Primitives in the SNOW Prototype, by Kanad Ghose, Seth Melnick, Thomas Gaska, Seth Goldberg, Arun Jayendran and Brian T. Stein, in Proc. of the 26th. Int'l. Conference on Parallel Processing (ICPP), 1997, pp.462-469. Analytical Models for Energy Dissipation in Low Power Caches, by Milind B. Kamble and Kanad Ghose, in Proc. of 1997 Int'l. Symposium on Low Power Electronic Design (ISPLED '97)(available from the ACM Press), pp. 143-148. ASSERTS: A Toolkit for Real-Time Software Design, Development and Evaluation, by Kanad Ghose, Sudhir Aggarwal, Pavel Vasek et al, in the Proc. of the 9-th Euromicro Real-Time Systems Workshop (available from the IEEE CS Press), 1997, pp. 224-232.

Patents

Under Construction

Current Ph.D. Students

Avadh Patel       Low-power processor design, multicore architecture     Ju-Young Jung       Low-power processor design, multicore architecture     Dong-Kook Shin       Caching in multicore architectures     Joseph Imperato, Jr.       Energy-efficient storage systems     Hui Zeng       Low-power processor design, multicore architecture     Matt T. Yourst       Efficient binary translation of X86 ISAs, multicore architecture     Onur Demir       secure networking     Dorin Hogea       Secure, high-performance storage systems

Current M.S. Students - not updated after 2001

Steve Rostedt   real-time TCP - now at RedHat     Alisa Neeman   Out-of-Core Visualization - now doing Ph.D. at UC-Santa Cruz     Bhavin Patel   secure networking     Brajesh Heda (EE)   custom VLSI for frequency estimation, TCAMs - now at Cadence, India     N. Chandra Sekhar (EE)   leakage reduction in caches - now at QualComm     SaiprasadVenkatraman   Web cache optimization - now at Akamai     Sreehari Gopalan   volume visualization processor based on DRAM with embedded logic     Xiangfeng Du   wireless TCP optimization     Raymond Chen   distributed shared-memory system

Former Ph.D. Students (with graduation date and first job after graduation)

Oguz Ergin  2005       Intel Barcelona Research Center     Zhihui Zhang  2005       Panasas Inc.     Gurhan Kucuk  2004       Yedetipe University, Istanbul     Dmitry Ponomarev  2003       SUNY-Binghamton     Stephen Shafer  2001       Lockheed Martin     James R. Ryder  2001       SUNY-Oneonta     Peter D. Sulatycke  2001       co-founder and CEO, WireSpeed Technologies, Inc.     Milind Kamble  1999       HP VLSI Labs; now at Intel     Pavel Vasek  1998       HP VLSI Labs     Kiran R. Desai  1996       Intel     Nitin K. Singhvi  1995       Intel     Neelima Mehdiratta  1994       Apogee Compilers; now at Cadence     Der-Chung Cheng  1992       AT&T Labs; now at JPL     David Bezek (co-advised with Dr. Peter M. Kogge)  1992       IBM

Former M.S. Students (with graduation date and first job after graduation - not updated after 2001!! Updates coming soon.)

Siddhartha Krishna  2001       Morgan Stanley     Siddharth Murthy  2001       Intel     Roshan D'Mello  2000       Goldman Sachs     Thomas Gaska  2000       Lockheed Martin     Suvani Kaura  2000       Agilent Technologies (HP)     Mahesh Mahadevan  2000       Motorola Wireless     Yifeng Shao  2000       Goldman Sachs     Nitin Malik  1999       Ascent Technologies     Poornima Gupte  1999       Compaq     Satyen Lele  1999       Compaq     Joseph Prusik  1999       Lockheed Martin     Ganpathy Hariharan  1999       Motorola     Manaswini Sawant  1999       Bay Area Networks     Xiaofang Li  1999       Sun     Vartika Agarwal  1999       Motorola     Arun Jayendran  1998       Sun     Seth Melnick  1997       Sapient     Kushagra Vaid  1996       Intel     Arif Khan  1996       Intel     Chandra Subhachandra  1995       University of Michigan     Sreenivas Simhadri  1994       Kuck Associates; now at Microsoft     Gerald Prothro  1994       IBM-TJ Watson     Ravindra Divekar  1994       HAL-Fujitsu; now at Phillips     Ajay Dhake  1993       Intel     Anand Dharmaraj (M.S.E.E.)  1992       HAL-Fujitsu     Jay Cummings  1991       SUNY-Binghamton; now at Lockheed Martin     Mukta Mohindra  1990       MCI     Wu-Cheng Huang  1990       University of Oregon     Rajan Kanitkar  1990       IBM     Andres Jaramillo  1989       University of Valencia (Spain); now at Pontificia Universidad Javeriana, Cali, Colombia

[Current Courses][Research][Projects][Recent Publications] [Patents][Current Students][Former Students]

Page updated Sunday, August 28, 2005.